synthesize

§ 01 · purpose

Purpose

Each per-slice design was produced *blind to its siblings*, so someone must make them fit: merge colliding edits to the same file, wire each dependency to the real shape its owner defined, and resolve incompatible decisions to one. For large slice maps it runs hierarchically (per-cluster sub-plans, then a root merge), so no single pass must hold every design at once.

§ 02 · when to use

When to use it

• Dispatched by the build pipeline after the design review accepts the per-slice designs.
• Root mode (--subplans) when a cluster fanout has produced partial sub-plans to merge.
• Prefer plan when there was no design fanout. This skill reconciles existing decisions; it never designs.

§ 03 · inputs

Inputs

--designs

Required in flat and partial modes; each contributes its File Map, Key Interfaces, Integration Points, and Success Criteria.

--subplans

Selects root mode. The root reads each sub-plan's summary, exports, and phases instead of re-reading every design.

--research

Supplies cross-slice constraints during reconciliation.

--as-subplan

Emits a compact sub-plan (partial mode) instead of a full plan.

§ 04 · outputs

Outputs

§ 05 · key steps

Key steps

1. 01 Read every input fully Why: Reconciliation only works over the complete set. A design skimmed is a collision missed. Hierarchy, not selective reading, is how context stays bounded.
2. 02 Reconcile overlap, integration, and conflict Why: This is the whole point of the barrier. Two blind designs touching the same file or symbol must become one coherent change. A dependency must reference the real shape its owner defined, not a guess at it.
3. 03 Record every resolution in Synthesis Notes Why: The grade panel's correctness and architecture-fit members check the resolutions, and elaborate later reads the notes as the reconciled seams it must not re-decide.
4. 04 Sequence one phase per slice, dependency-ordered Why: A phase must never precede one it depends on, or implement builds against interfaces that do not exist yet; tightly-coupled slices may merge into one phase, with the merge noted.
5. 05 Emit plan-compatible output with machine-readable phases Why: phase_count must equal both the phases: array length and the heading count. A downstream derive-check (a program, 0 LLM calls) rejects any mismatch. The standard phase shape lets implement and validate consume the plan unchanged.
6. 06 Decide conflicts yourself, never ask Why: The skill is non-interactive. The design review already collected the human's calls, so an unresolvable conflict gets the most defensible resolution on record. The grade panel catches a bad merge.

§ 06 · related skills

Related skills